anhinga_anhinga: (Default)
anhinga_anhinga ([personal profile] anhinga_anhinga) wrote2005-12-29 04:29 pm

SpikeNET; ICNC 2005

Found an event-driven simulation package for modeling large networks of spiking neurons (GNU public license), have not tried it yet:
http://www.sccn.ucsd.edu/~arno/spikenet/papers.html
http://www.sccn.ucsd.edu/~arno/spikenet

Browsed the proceedings of "Advances in natural computation : first international conference, ICNC 2005, Changsha, China, August 27-29, 2005 : proceedings / Lipo Wang, Ke Chen, Yew Soon Ong (eds.)." 3 very think volume of Lecture Notes in Computer Science, 3610-3612 at a nearby library. Almost 4000 pages of papers mostly by Chinese authors. At least they still chose to write in English... (DBLP link: http://www.informatik.uni-trier.de/~ley/db/conf/icnc)

[identity profile] http://users.livejournal.com/_rowan_tree_/ 2005-12-29 11:45 pm (UTC)(link)
At least they still chose to write in English... - did you try to read it? My experience with papers by some (not all, but a substantial percent) of foreign, especially Chinese authors, is that at least they still try to write in English. :-(

[identity profile] anhinga-anhinga.livejournal.com 2005-12-30 12:03 am (UTC)(link)
Yes, it's not a very good English mostly, but the quality of science seems to be going up. At least this is my impression from superficial browsing...

What occurred to me is that there is no equilibrium point in the future: given that they still know English much better, than other people know Chinese, and given how difficult Chinese seems to be, at the equilibrium (when the Chinese school does not have to publish in English too fast anymore), it can gain an advantage by simply publishing Chinese versions a year earlier.

At the end of the day, it's not about the quality of writing. So, unless we get a decent quality machine translation from Chinese before that moment...

[identity profile] spamsink.livejournal.com 2005-12-30 12:05 am (UTC)(link)
Alas, the capacity of today's FPGAs is not enough to simulate large networks. But if the network is regular, some state can be off-loaded to RAM; I wonder what performance can be achieved using a hardware-based implementation.